“I am encouraged to see Mentor addressing these challenges head-on by delivering its core DRC solution free of charge to ensure that the general engineering community can begin to tackle these issues.”Įvery PCB design, regardless of signal speed or frequency, should be evaluated for SI, PI, EMI/EMC and safety issues prior to fabrication to prevent costly design re-spins. Having confidence you don’t have this problem in your next board will increase your chance of first-pass success,” stated Eric Bogatin, dean of Signal Integrity Academy. Of all the problems to watch out for, avoiding signals passing over a gap in their return plane alone accounts for most of the EMC and crosstalk problems even in ’low speed’ designs. If designers do not pay attention to design rules for signal integrity, power integrity and EMC, chances are the board is not going to work the first time. “Interconnects are no longer transparent in high-speed digital and mixed-signal products, and even in many of the simplest IoT boards. ![]() ![]() Using built-in rules that can be parameterized, the user has immediate access to design verification technologies that are prevalent in the PCB design industry, without barriers to tool adoption. To mitigate the pressure from adhering to layout guidelines from IC vendors and standard bus technologies while meeting EMI/EMC, safety and corporate routing standards, Mentor is offering a free version of the HyperLynx DRC tool, which includes eight design rules, at no cost to any PCB designer or hardware engineer.ĭesign rule checking helps determine if the physical layout of a PCB or chip meets the minimum physical spacing and electrical requirements to reduce the likelihood of manufacturing or signal integrity (SI) or power integrity (PI) or EMI/EMC issues. Mentor, a Siemens business, today announced a new e-commerce offering of its market-leading HyperLynx® design rule check (DRC) tool.
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